1. Technical Field
The technical field is embedded capacitors. More particularly, the technical field includes capacitors on base metal foils having sputtered thin-film dielectrics that exhibit columnar grains.
2. Related Art
Since semiconductor devices including integrated circuits (IC) are operating at increasingly higher frequencies and data rates and at lower voltages, noise in the power and ground (return) lines and the need to supply sufficient current to accommodate the faster circuit switching becomes an increasingly important problem. In order to provide low noise and stable power to the IC, low impedance in the power distribution system is required. In conventional circuits, impedance is reduced by the use of additional surface mount technology (SMT) capacitors interconnected in parallel. The higher operating frequencies (higher IC switching speeds) mean that voltage response times to the IC must be faster. Lower operating voltages require that allowable voltage variations (ripple) and noise become smaller. For example, as a microprocessor IC switches and begins an operation, it calls for power to support the switching circuits. If the response time of the voltage supply is too slow, the microprocessor will experience a voltage drop or power droop that will exceed the allowable ripple voltage and noise margin and the IC will trigger false gates. Additionally, as the IC powers up, a slow response time will result in power overshoot. Power droop and overshoot must be controlled within allowable limits by the use of capacitors that are close enough to the IC that they provide or absorb power within the appropriate response time.
Power droop and overshoot are maintained within the allowable limits by the use of capacitors providing or absorbing power in the appropriate response time. Capacitors are generally placed as close to the IC as possible to improve circuit performance. Conventional designs have capacitors surface mounted on the printed wiring board (PWB) clustered around the IC. Large value capacitors are placed near the power supply, mid-range value capacitors at locations between the IC and the power supply and small value capacitors very near the IC.
Large numbers of capacitors, interconnected in parallel, are often needed to reduce power system impedance. This requires complex electrical routing, which leads to increased circuit loop inductance, thereby reducing some of the beneficial effects of the surface mounted capacitors. As frequencies increase and operating voltages continue to drop, power increases and higher capacitance has to be supplied at increasingly lower inductance levels.
A solution would be to incorporate (i.e., embed) a high capacitance density, thin-film ceramic capacitor in the PWB package onto which the IC is mounted. A single layer ceramic capacitor directly under the IC reduces the inductance to a minimum and the high capacitance density provides enough capacitance to satisfy the IC requirements. Such a capacitor in the PWB can provide capacitance at a significantly quicker response time and lower inductance.
Embedment of high capacitance, ceramic film capacitors in printed wiring boards using fired-on-foil techniques is known. Achieving a high capacitance density capacitor by use of a dielectric with a high permittivity or dielectric constant (K), such as barium titanate based compositions, and a thin-film dielectric is also known. In addition, thin-film capacitor dielectrics with a thickness of less than 1 micron are known. Chemical solution deposition and sputtering techniques for fired-on-foil thin-film capacitor fabrication is disclosed in U.S. Pat. No. 7,029,971 to Borland et al.
Initial deposition is either amorphous or crystalline or a combination of both depending upon deposition conditions. Amorphous compositions have low dielectric constants. High dielectric constants can only be achieved in crystalline phases. The high K ferroelectric tetragonal phase in barium titanate based dielectrics can only be achieved when grain sizes exceed approximately 0.1 micrometers and so firing of the deposited dielectric at high temperatures is performed to induce full crystallization and grain growth. This results in formation of the high K phase and an improved dielectric constant.
Sputtered dielectrics are often preferred due to their high level of densification. Sputtering, however, deposits a micro-crystalline dielectric having grain sizes that are about one tenth to one hundredth of the desired value, which means that sputtered capacitor dielectrics have low dielectric constants such as 400-600. This means grain sizes remain small due to their micro-crystalline characteristics and dielectric constants remain relatively low.
The problem to be solved, then, is to provide a sputtered dielectric having grain sizes that consequently yield high dielectric constants.